Integrated circuit devices comprise a semiconductor die having a variety of diffusions and overlying layers forming circuit elements, gates and the like. Generally, the penultimate layers fabricated on the die are conductive metal layers ("M") having patterns of conductive lines. Two or more metal layers ("M1", "M2", etc.) are separated by a dielectric layer of inter-layer dielectric (ILD). For purposes of this discussion, it is assumed that there are two conductive layers, a layer designated "M1", and a layer designated "M2". An ILD layer overlies the M1 layer, and the M2 layer overlies the ILD. Typically, a topmost passivation layer is applied over the M2 layer. Openings through this passivation layer expose areas of the M2 layer. These exposed areas are termed "bond sites". Connections to the die, hence to the circuitry contained on the die, are effected with these exposed areas. For example, bond wires may be bonded directly to the bond sites, or gold bumps may be formed on the bond sites for tape-automated bonding to the die, or gold balls may be formed on the exposed areas for flip-chipping the die to a substrate. This is all well known.
FIGS. 1A and 1B illustrate the structure of a prior art "composite bond pad" 100. Typically, a plurality of such bond pads would be disposed on a die. A partially-fabricated semiconductor die 102, having various diffusions and depositions (not shown), has a top surface 103. A layer 104 of insulating material (e.g., silicon dioxide) is formed on the surface 103. A patterned layer 106 of "barrier metal" is applied over the oxide 104 A patterned conductive layer 108 of "first" metal ("M1") is applied over the barrier metal 106, and is connected (not shown) to circuit elements (not shown) contained on the die. A layer 110 of inter-layer dielectric ("ILD"; e.g., silicon dioxide) is applied over the first metal layer 108, and is provided with an opening 112 extending through the layer 110 to the top surface (as viewed in the Figure) of the underlying M1 layer. A patterned conductive layer 114 of "second" metal ("M2") is applied over the ILD 110, and a portion 116 of this layer 114 forms a conductive "plug" filling the opening 112. A topmost "passivation" layer 118 (e.g., Borophosphosilicate Glass, or BPSG) is applied over the M2 and ILD layers, and is provided with an opening 120 extending through the passivation layer 118 to the top surface (as viewed in the Figure) of the underlying M2 layer. This leaves an area 120 of the top surface of the M2 layer exposed. The area 120 is termed the "contact area" ("bond site"). It is in this contact area that external connections to the die will be made, by any suitable means such as bond wires. Alternatively, gold bumps (not shown) or gold balls (not shown) can be formed atop the area 120, for tape-automated (TAB) bonding or flip-chip bonding to the die.
In aggregate, the elements 114, 116 and 108 comprise the "composite bond pad" 100 For purposes of this discussion, the portion of the metal layer 114 above dashed line 115 is termed "upper bond pad", and the portion of the lower metal layer 108 underlying the upper bond pad is termed "lower bond pad". The use of a barrier metal layer (106) underneath the bond pad (i.e., underneath the M1 layer) is optional, and offers certain protection against diffusion into the M1 layer of "fugitive" species (contaminants, vis-a-vis the M1 layer) from underlying layers in the die.
As best viewed in FIG. 1B, the (composite) bond pad 100 is generally square (it is shown in the Figure as a slightly elongated rectangle), and has dimensions on the order of 100.times.100 .mu.m (microns). Further, the upper bond pad may be larger than the "plug" 114. For example, if the upper bond pad measures 100 .mu.m across, the plug may measure only 80-90 .mu.m across. As is evident, only the outer peripheral region (for example the outermost 10% of the upper bond pad) of the upper bond pad rests on the ILD 110.
In practice, the lower bond pad element 108 may be a defined portion (shown as a slightly elongated rectangle) of a conductive line of the M1 layer.
In practice, a plurality of bond pads (100) are disposed on the top surface of the die, for making a plurality of input/output (I/O) connections to the die.
As mentioned above, ultimately the contact area 120 is bonded to, whether with a bond wire, or by the mechanism of gold bumps/balls. These various processes typically impart mechanical and or thermal energy directly onto the bond pad, especially in the contact area. It has been observed that these bonding processes, can cause the bond pad to delaminate (lift) from the underlying surfaces of multiple metal layers (e.g., 106) and oxide (e.g., 104). This bond pad lift problem can happen in all different kinds of bonding technology, such as aluminum wire bond, gold ball bonding, gold bump bonding, and others. This bond pad lift problem can become exacerbated when using an underlying layer of barrier metal (106), such as titanium (Ti), titanium nitride (TiN), Titanium-Tungsten (TiW), and the like, under the bond pads. Bond pad lift is very undesirable, and can result in potential problems in both assembly (packaging) yield and device reliability.
In the past, efforts to alleviate bond pad lift have been directed to: (1) adjusting bonding process parameters to minimize the thermal and/or mechanical shock to the bond pad; and (2) optimizing the barrier metal layer materials and deposition technology. These efforts have met with only partial success, and impose undesirable constraints (i.e., a narrow window of process parameters) on the bonding process.